Fundamental Analogue IC Design Training Course
Date: 19th to 23rd January 2015.
Venue: University of Limerick, Ireland
Course Fee: €2700 (€2350 for 3 or more delegates).
Course Tutor: Tim Cummins
This course aims to introduce participants to the fundamentals of CMOS sub-micron and nanometer analogue/mixed-signal IC design, and the underlying semiconductor physics principles. Participants will gain an understanding of basic analogue circuit principles and building blocks, and the design tools employed (schematics, simulation, layout, DRC/LVS), enabling them to become immediately productive in a mixed-signal environment. As well as classic circuits and amplifier/reference building blocks, the course covers a number of important basics not easily found in the textbooks: Crosstalk, isolation, leakage, breakdown, ESD, reliability, and the interdependence of analogue design with the underlying semiconductor technology. The afternoon practical sessions enable hands-on learning of physics concepts, schematic entry, simulation, layout, verification, using Applets, demos, schematic editor, simulator, and layout tools, which attendees can install and run on their laptops, or on the lab PC’s.
The course will be presented by Mr. Tim Cummins, who has over 25 years semiconductor R & D experience. He has developed high-voltage CMOS processes, and designed more than 20 mixed-signal and sensor IC’s, in Analog Devices, Silicon Labs, as well as in his own startup companies ChipSensors and AltraTech Ltd. He has authored 5 IEEE publications, and holds 18 patents in sensors and mixed-signal IC design.
This course is primarily aimed at graduate analogue/mixed-signal designers, and Digital/ASIC designers who want to switch to mixed signal design. It does not assume previous design, layout or tape-out experience. Product, Test, and Reliability engineers will also benefit from the accessible presentation and engagement format, in relating analogue IC design and chip performance to the underlying semiconductor physics and manufacturability aspects in modern nanometer CMOS technology.
Course Contents and Time Table
1.1 Semiconductor Basics, PN junctions, NPN Bipolar, formation
1.2 MOS Devices, CMOS processes, Oxidation, Diffusion/Implantation
1.3 LAB: SIMPLer Mask Layout, &Process Design-NPN, &dual Gate Ox NMOS
1.4 Photolithography;Back-End processing:Metal, Dielectrics,Etching
2.1 CMOS Modelling, Threshold Voltage, Device Equations, Large Signal Models
2.2 Small-Signal Models; 2nd Order Effects, SPICE models & accuracy
2.3 LAB: Schematic Entry; MOS I-V SPICE Simulation
2.4 CMOS Subcircuits: Switches; lev-shift; Current Sources I & V References
3.1 Amplifiers: 1 & 2 tr amplifiers; Frequency Response; CMOS vs BiCMOS
3.2 Cascoding; Diff Amps; OTA; PSRR/CMRR
3.3 LAB: SPICE Inverter Amplifier simulations: Gain, BW, delay sims
3.4 2-Stage Amplifier, Low-Voltage deep submicron analog design
4.1 Passives: R, L, C; Matching: Centroiding,
4.2 Filters: gmC, mosC; Filters: Switched Capacitor Circuits
4.3 LAB: Inverter Layout; LVS; DRC
4.4 Noise & Crosstalk in mixed-signal systems
5.1 CMOS Logic Types; Fanout; Metastability Tj; Pwr Diss; ja ESD Maps
5.2 Yield; Reliability; Deep Sub-Micron Manufacturability Halo/STI effects
5.3 LAB: Diff Amp Layout; Matching, Interdigitating
5.4 LAB Continued: OP-Amp design cont`d; Gain, Offset, freq response;